AI/ML driven ASIC Design and Implementation Principal Engineer
At a glance
Senior AI Engineering role at Nxp. Bangalore · full-time.
Pay not stated AI Engineering salary
aimlroles summary, based on the employer's posting.
What you'll do
- Explore AI/ML approaches for VLSI design and test prototypes against SoC and IP development needs
- Assess AI/ML CAD methods and define tool capabilities that could improve power, performance, area and verification
- Pilot automation on real designs with architecture, design, verification and implementation teams
- Improve design, verification and implementation workflows by addressing quality issues and testing new methods
What you bring
- A computer science, electrical engineering, computer engineering or related degree, with strong software development skills
- At least ten years building complex software projects, with practical Python and C++ programming experience
- Hands-on familiarity with Unix or Linux, version control and software debugging tools
- Strong analytical problem-solving and clear written and verbal communication
Who this fits
This role suits a senior software engineer who can apply AI/ML methods to VLSI design and collaborate across architecture, IP, SoC, verification and implementation teams. You’ll work on actual designs while developing and piloting automation.
From the employer
As an “AI/ML driven ASIC Design and Implementation Lead Engineer”, you will work in a dynamic environment to explore methodology, flows and tools to improve efficiency and quality of results (power, performance, area, and verification) for SoC and IP development teams across the organization. You'll be working and connecting with AI/ML and automation experts in the industry to explore state-of-the-art AI/ML CAD techniques as a part of VLSI CAD SW, prescribe key methods and requirements for tools & features to leverage for ASIC design.
In this role, you will work & develop prototype solutions to evaluate various state-of-the-art AI/ML techniques to identify the best solutions in close collaboration with Architecture, IP design, SoC Design, Verification, Implementation and Design Enablement teams to drive new ways of working, improvements to current ways of working, addressing design quality challenges and continuously improve NXP Semiconductors design, verification and implementation flows. While developing these new ways of working, successful candidates will be working on actual designs and implementation to pilot and develop the automation.
This opportunity is to enable Digital Transformation to leverage state-of-the-art AI/ML ideas to improve NXP designs for the Edge-AI, Automotive Processors and Advanced microcontrollers in NXP.
Successful candidate will be working in a fast-paced engineering environment, on a leading-edge advanced node technologies enabling automated building of exciting and complex SoCs.
Job Summary
Explore research ideas and solutions that bring AI/ML applications to VLSI design
Work closely with Academic research communities in AI/ML for VLSI design, Architecture teams, IP and SoC designers and SoC Implementation teams from multiple sites to explore and evaluate for leading edge SoC technologies serving multiple industries
These automation applications include use of GenAI, Reinforcement Learning, Graph Neural Networks, and convolutional Networks
Strong AI/ML expertise and software background required
Job Qualifications
BS or MS in Computer Science, Electrical Engineering, Computer Engineering or related disciplines with strong background in SW development
10+ years of experience in developing complex SW projects, and hands-on expertise in programming using Python & C++
Hands on experience in Unix/Linux, revision control (Git, BitBucket), SW development and debug tools
Excellent analytical problem solving skills
Strong verbal and written communication skills
Desirable skills/experience:
Data structures, algorithms and SW development for optimization problems.
Prior experience in VLSI CAD methodology and tool development
Understanding or prior experience with EDA tools for design, verification, DFT and implementation
Strong understanding of design, layout, constraints (SDC, Clocks, CDC, RDC), Static timing analysis, Low-power and Power-aware flows (UPF)
Experience with Design revision control (GIT, DesignSync) and Make Splunk, Jenkins, LSF and CI/CD process